122 lines
2.8 KiB
Markdown
122 lines
2.8 KiB
Markdown
# Mobile Architecture
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#### Typical Motherboard of a PC
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##### North-bridge
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* Links the CPU to high-speed devices like RAM, GPU, etc.
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##### South-bridge
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Connects to low-speed devices like IO devices, PCI devices, ROM/BIOS, etc.
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#### Connections
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* The CPU has a bus that connects it to the other chips (address, data and control buses)
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* Buses create a lot of heat; this bottlenecks mobile devices.
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* Nowadays more advanced buses are used: **HyperBus**.
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Intel Pentium Chip (1993) - put all different components on one chip to save power. This is the same logic mobile devices use.
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#### System on a Chip (SoC)
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* The whole system is literally on a single chip
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> * Aims to reduce communications overhead
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> * Aims to reduce heat
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The chip is divided into multiple regions, each of which deals with a different task, and is built block by block from descriptions of separate parts.
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* CPU core
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* GPU core
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* RAM core
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* Qualcomm Snapdragon
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* Apple A4-A13
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* Texas Instruments OMAP
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**All use the same CPU block**: ARM Cortex A\*
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##### Package on Package
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* RAM is normally not included in SoC
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* Uses a lot of space
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* It is a separate package stacked on top of the SoC
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* Stacked to save space
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#### ARM CPU vs Intel x86
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* Almost all smartphones use ARM CPUs
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**Why?**
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* Fast and efficient
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* Higher code density
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* Better utilisation of space
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* Less power consumption
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* Intel: ~45W vs ARM ~3W
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* ARM is sold as a design, not a physical device
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* Great for SoC usage. Chip manufacturers can add an ARM CPU to a bespoke SoC rather than buying a set chip from Intel.
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* x86 chips can take many cycles, whereas ARM aims for one instruction per cycle
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##### ARM CPU
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ARM uses a RISC
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RISC: add two numbers:
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```assembly
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ADD R1, R2, R3
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```
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CISC: add two numbers:
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```assembly
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POP num1
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POP num2
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ADD num1, num2, result
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PUSH result
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```
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* ARM has a fixed instruction width of 32 bits
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* Makes decoding easier & more efficient
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###### ARM CPU Registers
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* 13 general purpose registers (r0-r12)
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* r13 stack pointer
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* r14 link register
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* r15 program counter
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A register performing a data processing instruction
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##### ARM and Thumb
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* Every ARM instruction is 32 bits long
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* Can take up a lot of memory - poor code density
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* Memory accesses take time
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* Not all memory needs 32 bits
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* Thumb
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* 16-bit version of the ARM instruction set
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* Variable length instruction set
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* Can run 2 thumbs in parallel
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* One 32-bit read gives two 16-bit instructions
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##### ARM big.LITTLE
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ARM's processor contains low and high-performance cores
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* Two cores are architecturally consistent
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* System can switch between the two as appropriate for the task
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* e.g. idling - low-performance core |