notes/docs/lectures/mdp/01_mobile_architeture.md

Mobile Architecture

Typical Motherboard of a PC

North-bridge

• Links the CPU to high-speed devices like RAM, GPU, etc.

South-bridge

Connects to low-speed devices like IO devices, PCI devices, ROM/BIOS, etc.

Connections

• The CPU has a bus that connects it to the other chips (address, data and control buses)
  • Buses create a lot of heat; this bottlenecks mobile devices.
• Nowadays more advanced buses are used: HyperBus.

Intel Pentium Chip (1993) - put all different components on one chip to save power. This is the same logic mobile devices use.

System on a Chip (SoC)

• The whole system is literally on a single chip

• Aims to reduce communications overhead
• Aims to reduce heat

The chip is divided into multiple regions, each of which deals with a different task, and is built block by block from descriptions of separate parts.

• CPU core
• GPU core
• RAM core
• Qualcomm Snapdragon
• Apple A4-A13
• Texas Instruments OMAP

All use the same CPU block: ARM Cortex A*

Package on Package

• RAM is normally not included in SoC
  • Uses a lot of space
• It is a separate package stacked on top of the SoC
  • Stacked to save space

ARM CPU vs Intel x86

• Almost all smartphones use ARM CPUs

Why?

• Fast and efficient
  • Higher code density
  • Better utilisation of space
• Less power consumption
  • Intel: ~45W vs ARM ~3W
• ARM is sold as a design, not a physical device
  • Great for SoC usage. Chip manufacturers can add an ARM CPU to a bespoke SoC rather than buying a set chip from Intel.
• x86 chips can take many cycles, whereas ARM aims for one instruction per cycle

ARM CPU

ARM uses a RISC

RISC: add two numbers:

ADD R1, R2, R3

CISC: add two numbers:

POP num1
POP num2
ADD num1, num2, result
PUSH result

• ARM has a fixed instruction width of 32 bits
  • Makes decoding easier & more efficient

ARM CPU Registers

• 13 general purpose registers (r0-r12)
  • r13 stack pointer
  • r14 link register
  • r15 program counter

A register performing a data processing instruction

ARM and Thumb

• Every ARM instruction is 32 bits long
  • Can take up a lot of memory - poor code density
  • Memory accesses take time
  • Not all memory needs 32 bits
• Thumb
  • 16-bit version of the ARM instruction set
  • Variable length instruction set
  • Can run 2 thumbs in parallel
    • One 32-bit read gives two 16-bit instructions

ARM big.LITTLE

ARM's processor contains low and high-performance cores

• Two cores are architecturally consistent
• System can switch between the two as appropriate for the task
  • e.g. idling - low-performance core